Solid-state storage, such as NAND flash memory, stores data in arrays of storage cells, which, in the case of flash memory, are formed from floating-gate transistors. NAND flash memory devices return previously stored data by reading a set of bits from cells in an array. The time required to erase data from a cell is typically longer than the time required to write data to a cell and typically much longer than the time required to read data from a cell. As sizes for memory elements continue to decrease, erase times and write times continue to increase at a faster rate than read times.
Read operations typically occur for small sets of memory cells, program operations typically occur for the same or larger sets of memory cells than read operations, and erase operations typically occur for even larger sets of memory cells. Many flash memory devices are designed to keep read times as low as possible to allow very fast access to the data stored at the memory cells. Write/program times are typically longer than read times, but shorter than erase times.
A memory device may include one or more chips, and a chip may include one or more arrays of memory cells. While a storage operation is being performed for a given set of cells, other access to the chip on which the cells are located may be blocked, including reading data stored in other cells on the same chip or writing data to a block of cells on the same chip. As a result, an application requesting access to a given cell or group of cells for a read operation may not be able perform the read operation for some time if an erase or program operation is being performed at the chip on which the given cell is located.